Ivannikov Institute for System Programming of the RAS


Specification-Driven Testbench Development for Synchronous Parallel-Pipeline Designs.

Authors

M. Chupilko, A. Kamkin.

Abstract

In this paper an approach to testbench development for synchronous parallel-pipeline designs is considered. The approach is based on cycle-accurate formal specifications of a design under verification. Specifications include descriptions of control flow graphs of the design's operations and definitions of the microoperations with the help of Hoare triples. The approach allows to automate testbench development for complex synchronous designs with control flow branching and parallel starting operations.

Full text of the paper in pdf

Keywords

simulation-based verification, formal specification, testbench automation, assertions, co-simulation.

Edition

NorChip-2009, pp.1-4.

DOI: 10.1109/NORCHP.2009.5397808

Research Group

Software Engineering

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