Ivannikov Institute for System Programming of the RAS


MicroTESK: An ADL-Based Reconfigurable Test Program Generator for Microprocessors.

Authors

Kamkin A., Tatarnikov A.

Abstract

Test program generation plays a major role in functional verification of microprocessors. Due to tremendous growth in complexity of modern designs and rigid constraints on time to market, it becomes an increasingly difficult task. In spite of powerful test program generators available in the market, development of functional tests is still known to be the bottleneck of the microprocessor design cycle. The common problem is that it takes significant effort to reconfigure a test program generation tool for a new microprocess or design. The model-based approach applied in the state-of-the-art tools, like Genesys-Pro, still does not provide enough flexibility since creating a microprocessor model is difficult and requires special knowledge and skills. The article suggests an approach to ease generator customization by using architecture specifications that describe the microprocessor behavior at a higher level. The approach is aimed at facilitating development of architecture models and, thus, minimizing time required to create functional tests. At the moment, we are working to implement a new generation of the test program generator MicroTESK that can be easily configured for various microprocessor architectures.

Full text of the paper in pdf

Keywords

Microprocessor design, architecture description languages, test program generation, functional verification, model-based testing.

Edition

Proceedings of the 6th Spring/Summer Young Researchers’ Colloquium on Software Engineering (SYRCoSE).

DOI: 10.15514/SYRCOSE-2012-6-8

Research Group

Software Engineering

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