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20 Ноября, 2015

Лекция профессора Заиналабедина Наваби (Университет Тегерана, Иран / Вустерский политехнический институт, США)

18 декабря в 14:00 в аудитории 110 состоится лекция/туториал профессора Заиналабедина Наваби (Университет Тегерана, Иран / Вустерский политехнический институт, США).

Название: ESL Design with SystemC Based Abstract Communications
Продолжительность: 3 часа 30 минут

Аннотация: Over the past fifty years microelectronics design has evolved from transistor level to ESL (electronic system level). Design at the transistor level involves putting transistors together (processing elements) using simple wires (communications), where ESL design involves putting together complex cores and processing elements and interconnecting them using abstract communication channels. To cope with this evolving technology, new hardware description languages and abstract design methodologies have emerged. The object oriented C++ based SystemC language and its derivatives have become the language to use for this evolving technology. In this short-course we start with the necessary C++ object-oriented topics for proper description of digital systems. We will then present the IEEE Standard 1666 SystemC language for RT level description of hardware. For those who are already familiar with RTL, this part serves as an entry point into SystemC and the use of this standard at higher levels of abstraction. With this introduction to SystemC, we will then move into abstract communications and the use of SystemC TLM derivatives that are made for the purpose of describing abstract communications. This is a three and a half hour lecture with an approximately one-hour hands-on session covering SystemC.

Регистрация участников: kamkin@ispras.ru

Dr. Zainalabedin NavabiDr. Zainalabedin Navabi is a professor of Electrical and Computer Engineering at the University of Tehran, and an adjunct professor at Worcester Polytechnic Institute. Dr. Navabi is the author of several textbooks and computer based trainings on VHDL, Verilog and related tools and environments. Dr. Navabi’s involvement with hardware description languages begins in 1976, when he started the development of a register-transfer level simulator for one of the very first HDLs. In 1981 he completed the development of a synthesis tool that generated MOS layout from an RTL description. Since 1981, Dr. Navabi has been involved in the design, definition and implementation of Hardware Description Languages. He has written numerous papers on the application of HDLs in simulation, synthesis and test of digital systems. He started one of the first full HDL courses at Northeastern University in 1990. Since then he has conducted many short courses and tutorials on this subject in the United States, Europe and Asia. Since early 1990’s he has been involved in developing, producing, and broadcasting online and video lectures on HDLs, Digital System Test, and various aspects of automated design. In addition to being a professor, he is also a consultant to CAE companies. Dr. Navabi received his M.S. and Ph.D. from the University of Arizona in 1978 and 1981, and his B.S. from the University of Texas at Austin in 1975. He is a senior member of IEEE, a member of IEEE Computer Society, member of ASEE, and ACM.

EDUCATION:

  • Ph.D. in Electrical Engineering, University of Arizona, 1981.
  • M.S. in Electrical Engineering, University of Arizona, 1978.
  • B.S. in Electrical Engineering, University of Texas, Austin, 1975.

BOOKS:

  • “VHDL: Analysis and Modeling of Digital Systems” (Series in Electrical and Computer Engineering); September 1992; McGraw Hill College Division; ISBN: 0070464723;
  • “VHDL: Analysis and Modeling of Digital Systems”; December 1997; McGraw Hill Text; ISBN: 0070464790;
  • “Verilog Digital System Design”; June 1999; McGraw Hill Text; ISBN: 0070471649;
  • “Verilog Computer-Based Training Course”; CBT CD with hardcopy User's manual; August 2002; McGraw-Hill; ISBN 0-07-137473-6;
  • "Digital Design and Implementation with Field Programmable Devices", Kluwer Academic Publishers, 2005, ISBN: 1-4020-8011-5;
  • “Verilog Digital System Design: Register Transfer Level Synthesis, Testbench, and Verification”; 2006; McGraw Hill-Professional; ISBN: 0070144564-1;
  • “Embedded Core Design with FPGAs”; August 1, 2006; McGraw Hill-Professional; ISBN: 0071474811;
  • VHDL: Modular Design and Synthesis of Cores and Systems, 3E; April 2007; McGraw Hill-Professional; ISBN: 978-0071475464;
  • Digital System Test and Testable Design: Using HDL Models and Architectures; January 2011; Springer; ISBN: 978-1-4419-7547-8.

BOOK CHAPTERS:

  • Z. Navabi, “Chapter 81, Hardware Description in Verilog: An Overview”, The VLSI Handbook, CRC IEEE PRESS, 2000, ISBN: 0-8493-8593-8.
  • Z. Navabi, “Section XIII, Design Languages”, Section Editor, The VLSI Handbook, Second Edition (Electrical Engineering Handbook), CRC Press, 2006, ISBN: 978-0849341991.
  • Z. Navabi, “Chapter 85: Languages for Design and Implementation of Hardware”, The VLSI Handbook, Second Edition (Electrical Engineering Handbook), CRC Press, 2006, ISBN: 978-0849341991.
  • Shahrzad Mirkhani and Zainalabedin Navabi, “Chapter 86, System Level Design Languages”, The VLSI Handbook, Second Edition (Electrical Engineering Handbook), CRC Press, 2006, ISBN: 978-0849341991.
  • Mahsan Rofouei and Zainalabedin Navabi, “Chapter 87, RT Level Hardware Description with VHDL”, The VLSI Handbook, Second Edition (Electrical Engineering Handbook), CRC Press, 2006, ISBN: 978-0849341991.
  • Zainalabedin Navabi, “Chapter 88, Register Transfer Level Hardware Description with Verilog”, The VLSI Handbook, Second Edition (Electrical Engineering Handbook), CRC Press, 2006, ISBN: 978-0849341991.
  • Shahrzad Mirkhani and Zainalabedin Navabi, “Chapter 89, Register-Transfer Level Hardware Description with SystemC”, The VLSI Handbook, Second Edition (Electrical Engineering Handbook), CRC Press, 2006, ISBN: 978-0849341991.
  • Naghmeh Karimi and Zainalabedin Navabi, “Chapter 91 VHDL-AMS Hardware Description Language”, The VLSI Handbook, Second Edition (Electrical Engineering Handbook), CRC Press, 2006, ISBN: 978-0849341991.
  • Hamid Shojaei and Zainalabedin Navabi, “Chapter 92, Verification Languages”, The VLSI Handbook, Second Edition (Electrical Engineering Handbook), CRC Press, 2006, ISBN: 978-0849341991.
  • Naghmeh Karimi and Zainalabedin Navabi 93 ASIC and Custom IC Cell Information Representation”, The VLSI Handbook, Second Edition (Electrical Engineering Handbook), CRC Press, 2006, ISBN: 978-0849341991.
  • Shahrzad Mirkhani and Zainalabedin Navabi, “Chapter 94, Test Languages”, The VLSI Handbook, Second Edition (Electrical Engineering Handbook), CRC Press, 2006, ISBN: 978-0849341991.
  • Naghmeh Karimi and Zainalabedin Navabi, “Chapter 95, Timing Description Languages”, The VLSI Handbook, Second Edition (Electrical Engineering Handbook), CRC Press, 2006, ISBN: 978-0849341991.

ON-SITE HDL COURSES:

  • RT Level Design and Test; Technical University of Estonia, 2013
  • Methodologies for System Level Design; Technical University of Estonia, 2012
  • Verilog Design and Synthesis; P&E Micro, 2007
  • Verilog Elements of System Design; Intel, 2006
  • VHDL Simulation and Synthesis; OpenCell, 2006
  • VHDL for Design and Simulation; Teradyne, 1999-2003
  • VHDL and Verilog Trainings, Aldec, 1997-2003
  • VHDL Simulation, Synthesis and Testbench; Unisys, 2002
  • Verilog Simulation, Synthesis and Testbench; Unisys, 2001
  • VHDL for Synthesis; Teradyne, 2000
  • Hardware Description in VHDL; Innoveda, 1994-1996
  • VHDL for Design, Simulation and Synthesis; GTE, 1995
  • VHDL for CPU Design; Hughes Networks, 1994
  • VITAL Standard for Timing; Teradyne, 1994
  • The complete VHDL Language; Okura (Japan), 1994
  • VHDL Hardware Description Language; John Hopkins University, 1991

RELATED WEB SITES:

  • https://rtis.ut.ac.ir/cv/navabi
  • http://www.wpi.edu/academics/facultydir/zn.html
  • https://www.uic.edu/eng/meng/faculty.htm
  • http://cpe.wpi.edu/online/ece-gradcert.html


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