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Test Data Generation for LRU Cache-Memory testing.
Authors
Evgeni Kornikhin.
Abstract
System functional testing of microprocessors deals with many assembly programs of given behavior. The paper proposes new constraint-based algorithm of initial cache-memory contents generation for given behavior of assembly program (with
cache misses and hits). Although algorithm works for any types of cache-memory, the paper describes algorithm in detail for basis types of cache-memory only: fully associative cache and direct mapped cache.
Edition
SYRCoSE'09, pp.88-92.
DOI: 10.15514/SYRCOSE-2009-3-16
ISBN 978-5-91474-013-6