Ivannikov Institute for System Programming of the RAS


Recognition and Explanation of Incorrect Behavior in Simulation-based Hardware Verification.

Authors

M. Chupilko, A. Protsenko.

Abstract

Simulation-based unit-level hardware verification is intended for dynamical checking of hardware designs against their specifications. There are different ways of the specification development and design correctness checking but it is still difficult to diagnose something more than incorrect data on some or other design outputs. The proposed approach is not only to find erroneous design behavior but also to make an explanation of incorrectness on the base of resulted reactions based on special mechanism using a list of explanatory rules.

Full text of the paper in pdf

Edition

Spring/Summer Young Researchers’ Colloquium on Software Engineering (SYRCoSE), 2013. P. 25-30.

DOI: 10.15514/SYRCOSE-2013-7-4

Research Group

Software Engineering

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