- About
- Innovations
- Divisions
- Compiler Technology Department
- Computer Systems Department
- Information Systems Department
- Software Engineering Department
- System integration and multi-disciplinary collaborative environments
- System Programming Department
- Theoretical Computer Science Department
- Academic council
- Dissertation council
- Verification Center of the Operating System Linux
- Center of competence in parallel and distributed computing
- Education
- Editions
- News
Test Data Generation for LRU Cache-Memory testing.
Authors
Evgeni Kornikhin.
Abstract
System functional testing of microprocessors deals with many assembly programs of given behavior. The paper proposes new constraint-based algorithm of initial cache-memory contents generation for given behavior of assembly program (with
cache misses and hits). Although algorithm works for any types of cache-memory, the paper describes algorithm in detail for basis types of cache-memory only: fully associative cache and direct mapped cache.
Edition
SYRCoSE'09, pp.88-92.
DOI: 10.15514/SYRCOSE-2009-3-16
ISBN 978-5-91474-013-6
Research Group
All publications during 2009
All publications
На нашем сайте мы используем cookie файлы, содержащие информацию о предыдущих посещениях веб-сайта. Данные обрабатываются для улучшения качества работы нашего веб-сайта. Если вы не хотите использовать cookie файлы, измените настройки браузера.
Понятно